The XDR™2 memory architecture is the world's fastest memory system solution capable of providing twice the peak bandwidth per device when compared to a GDDR5-based system. Further, the XDR2 memory architecture delivers this performance at 30% lower power than GDDR5 at equivalent bandwidth.
Designed for scalability, power efficiency and manufacturability, the XDR2 architecture is a complete memory solution ideally suited for high-performance gaming, graphics and multi-core compute applications.
Initial systems can achieve memory bandwidths of over 500GB/s into an SoC. Each XDR DRAM can deliver up to 38.4GB/s of peak bandwidth from a single, 4-byte-wide, 9.6Gbps XDR2 DRAM device, and the XDR2 architecture supports a roadmap to device bandwidths of over 50GB/s.
Capable of data rates of 6.4 to 12.8Gbps, the XDR2 architecture is the latest generation in the award-winning family of XDR products. With backwards compatibility to XDR DRAM, the XDR2 architecture is part of a continuously compatible roadmap, offering a path for both performance upgrades and system cost reductions.The XDR2 memory architecture is the first to incorporate innovations from Rambus' TERABYTE BANDWIDTH INTIATIVE along with other key Rambus innovations including:
16X DATA RATE enables high data rates (up to 12.8Gbps) at lower system clock and on-chip bus interface speeds.
FULLY DEFFERENTIAL MEMORY ARCHITECTURE(FDMA) improves signal integrity, reduces power and enables the highest memory performance available.
Enhanced FlexPhase™ enables high data rates, simplifies layout and eliminates trace length matching.
FlexLink™ C/A reduces system costs and controller pin-count while providing scalable capacity and flexible access granularity.
Micro-threading increases transfer efficiency on micro-threaded workloads while reducing power consumption.
Designed for scalability, power efficiency and manufacturability, the XDR2 architecture is a complete memory solution ideally suited for high-performance gaming, graphics and multi-core compute applications.
Initial systems can achieve memory bandwidths of over 500GB/s into an SoC. Each XDR DRAM can deliver up to 38.4GB/s of peak bandwidth from a single, 4-byte-wide, 9.6Gbps XDR2 DRAM device, and the XDR2 architecture supports a roadmap to device bandwidths of over 50GB/s.
Capable of data rates of 6.4 to 12.8Gbps, the XDR2 architecture is the latest generation in the award-winning family of XDR products. With backwards compatibility to XDR DRAM, the XDR2 architecture is part of a continuously compatible roadmap, offering a path for both performance upgrades and system cost reductions.The XDR2 memory architecture is the first to incorporate innovations from Rambus' TERABYTE BANDWIDTH INTIATIVE along with other key Rambus innovations including:
16X DATA RATE enables high data rates (up to 12.8Gbps) at lower system clock and on-chip bus interface speeds.
FULLY DEFFERENTIAL MEMORY ARCHITECTURE(FDMA) improves signal integrity, reduces power and enables the highest memory performance available.
Enhanced FlexPhase™ enables high data rates, simplifies layout and eliminates trace length matching.
FlexLink™ C/A reduces system costs and controller pin-count while providing scalable capacity and flexible access granularity.
Micro-threading increases transfer efficiency on micro-threaded workloads while reducing power consumption.
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